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AKTU Physical Design for VLSI Circuits (BVL602) Syllabus PDF – B.Tech 3rd Year
Physical Design for VLSI Circuits BVL602
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Official AKTU syllabus of Physical Design for VLSI Circuits (BVL602) for B.Tech 3rd Year – 4 credits, L-T-P 3-1-0. Read the unit-wise course content, course outcomes, evaluation pattern and recommended books online, or download the PDF.
Syllabus — Physical Design for VLSI Circuits
Download PDFBVL602 · 4 credits · L-T-P 3-1-0
| Unit | Topics | Lectures |
|---|---|---|
| I | Introduction: VLSI Design flow, Physical Design Cycle, VLSI Design Styles, Common EDA Terminology. Partitioning – Problem formulation, Classification of Partitioning algorithms, Kernighan-Lin Algorithm, Simulated Annealing, Fiduccia-Mattheyses (FM) Algorithm. | 8 |
| II | Floor Planning – Problem formulation, Classification of floor planning algorithms, constraint-based floor planning, Rectangular Dualization, Pin Assignment – Problem formulation, Classification of pin assignment algorithms, General and channel Pin assignments. | 8 |
| III | Placement – Problem formulation, Placement algorithms: standard cell placement, timing-driven placement, Classification of placement algorithms, Partitioning based placement algorithms. Power planning and IR drop considerations | 8 |
| IV | Clock Tree Synthesis (CTS) and Routing Clock distribution challenges: skew, latency, and insertion delay, CTS methodologies: H-tree, X-tree, and balanced clock trees, Clock gating. Global routing and detailed routing techniques, Routing constraints: DRC, wire load models, parasitic extraction | 8 |
| V | Timing and Power Analysis Static Timing Analysis (STA): setup and hold analysis, Timing closure challenges and optimization techniques Power analysis: dynamic, leakage, IR drop, and power grid design | 8 |
Text Books
- N.A.Sherwani , “Algorithms for VLSI Physical Design Automation”, (3/e), Kluwer,1999.
- Andrew B. Kahng, Jens Lienig, Igor L. Markov, JinHu,VLSI Physical Design: From Graph Partitioning to Timing Closure, Springer, 2011.
Reference Books
- H. Yosuff and S.M. Sait, VLSI Physical Design Automation – Theory and Practice, Cambridge India, 2010.
- Khosrow Golshan, “Physical Design Essentials-An ASIC Design Implementation Perspective” Springer New York, NY, 2007. DOI: https://doi.org/10.1007/978-0-387-46115-1.
- S.H. Gerez, “Algorithms for VLSI Design Automation”, John Wiley ,1998.
- Sung Kyu Lim, Practical Problems in VLSI Physical Design Automation, Springer India, 2011.
Course Outcomes
- Understood the physical design flow and different VLSI design styles.
- Apply partitioning in a given circuit.
- Design and optimized floorplans of a circuit.
- Optimize placements on the silicon chip and perform complex routing using algorithms.
- Design clock trees to distribute the clock signals on the chip while satisfying various constraints like clock skew and wire length.
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