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AKTU CMOS Analog VLSI Design (BEC058) Syllabus PDF – B.Tech 3rd Year
CMOS Analog VLSI Design BEC058
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Official AKTU syllabus of CMOS Analog VLSI Design (BEC058) for B.Tech 3rd Year – 3 credits, L-T-P 3-0-0. Read the unit-wise course content, course outcomes, evaluation pattern and recommended books online, or download the PDF.
Syllabus — CMOS Analog VLSI Design
Download PDFBEC058 · 3 credits · L-T-P 3-0-0
| Unit | Topics | Lectures |
|---|---|---|
| I | Introduction to MOS: MOS device models and short channel effects MOSFET level 1 and level 2 models, threshold voltage model, MOSFET basics, Single stage amplifiers, Basic concept, Common source stage: with resistive load, with diode connected load, with current-source load, with triode load, with source degeneration Source follower (common-drain) and common gate with various loads. | 8 |
| II | Scheme and Implementation: basic current mirrors, cascode current mirrors and active current mirrors with large and small signal analysis, CMOS amplifier Frequency response: Miller effect, common source (CS), common gate (CG), common drain (CD) stages. | 8 |
| III | Noise: types of noise, significance of flicker and thermal. Analysis and representation of noise in single stage amplifiers: CG, CS, CD (source follower) and cascode stage and noise in differential pairs. Feedback: Feedback topologies (voltage-voltage, current-voltage, voltage-current, current-voltage) and the noise and the loading effect analysis. | 8 |
| IV | Design of the CMOS Operational Amplifiers: One-stage opamps and two stage opamps, Gain boosting techniques, folded cascode, telescopic amplifier and common mode feedback (CMFB) amplifier, Design of high speed and high gain amplifiers. | 8 |
| V | Stability and Frequency Compensation: Specification analysis, multi-pole system, three stage opamp, phase margin Frequency compensation, pole-zero doublet analysis, Analog layout techniques, Design rule check (DRC), layout versus schematic (LVS) and antenna effects. | 8 |
Content beyond the Course:
Topics such as analog layout techniques, Design Rule Check (DRC), Layout Versus Schematic (LVS), CMOS amplifier design and physical verification, as covered in this syllabus, can be implemented and verified using “Siemens EDA (Calibre)/ Cadence/ Synopsys or similar relevant software tools”.
Text Books
- Design of Analog CMOS Integrated Circuits” by Behzad Razavi, McGraw Hill Education.
- “CMOS Analog Circuit Design” by Phillip Allen and Douglas R. Holberg, OUP USA; Third Edition.
Reference Books
- “Operation and Modeling of the MOS Transistor” by Yannis Tsividis, Oxford University Press; 2nd edition.
- “Microelectronic Circuits-Theory & Applications” by A.S. Sedra and K.C. Smith, Adapted by A.N. Chandorkar, 6th Edition, Oxford, 2013.
Course Outcomes
- Analyze the basics concepts of MOSFET and modelling of single stage amplifiers.
- Illustrate the various current mirror structures and layout techniques.
- Analyze the different types of noise in MOSFET based amplifiers.
- Illustrate designing of CMOS based operational amplifiers.
- Analyze the stability analysis in MOSFET based amplifiers and oscillators.
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