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AKTU Low Power VLSI Design (BVL052) Syllabus PDF – B.Tech 3rd Year
Low Power VLSI Design BVL052
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Official AKTU syllabus of Low Power VLSI Design (BVL052) for B.Tech 3rd Year – 3 credits, L-T-P 3-0-0. Read the unit-wise course content, course outcomes, evaluation pattern and recommended books online, or download the PDF.
Syllabus — Low Power VLSI Design
Download PDFBVL052 · 3 credits · L-T-P 3-0-0
| Unit | Topics | Lectures |
|---|---|---|
| I | POWER DISSIPATION IN CMOS: Sources of power dissipation – Physics of power dissipation in MOSFET devices: The MIS structure, long channel MOSFET, Submicron MOSFET, gate induced drain leakage– Power dissipation in CMOS: short circuit dissipation, dynamic dissipation, load capacitance– Low power VLSI design: Limits – principles of low power design. | 8 |
| II | DESIGN OF LOW POWER CIRCUITS: Transistor and Gate Sizing: Sizing an Inverter Chain, Transistor and Gate Sizing for Dynamic Power Reduction, Transistor Sizing for Leakage Power Reduction - Network Restructuring and Reorganization: Transistor Network Restructuring, Transistor Network Partitioning and Reorganization - Special Latches and Flip-flops: Self-gating Flip-flop, Varieties of Boolean Functions, Adjustable Device Threshold Voltage. | 8 |
| III | SYNTHESIS FOR LOW POWER: Behavioral Level Transforms, Logic Level Optimization for Low power, Circuit Level Optimization | 8 |
| IV | LOW POWER STATIC RAM ARCHITECTURES: Organization of a static RAM, MOS Static RAM Memory cell, Banked organization of SRAMs, Reducing voltage swings on bit lines, Reducing power in write driver circuits, Reducing power in sense amplifier circuits, method for achieving low core voltages from a single supply. | 8 |
| V | DESIGN AND TEST OF LOW VOLTAGE CMOS CIRCUITS: Circuit Design style, Leakage current in deep submicrometer transistors, Deep submicrometer device design issues, Low voltage circuit design techniques, Designing deep submicrometer ICs with elevated intrinsic leakage, multiple supply voltages. | 8 |
Text Books
- K. Roy and S. C. Prasad, Low Power CMOS VLSI Circuit Design, John Wiley and Sons, 3 rd Edition, 2009.
- Jan Rabaey, Low Power Design Essentials, Springer Publications, 1 st Edition, 2009.
Reference Books
- Chandrakasan and R. Brodersen, Low-Power CMOS Design, IEEE Press, 1 st Edition, 1995.
- Chandrakasan, Bowhill, and Fox, Design of High-Performance Microprocessors, IEEE Press, 1st Edition, 2000.
Course Outcomes
- Able to understand basics of Power Dissipation.
- Able to learn low power circuit design
- Able to learn circuit level optimization.
- Able to acquire knowledge on SRAM.
- Able to design low power circuit at submicron level.
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