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AKTU Computer Organization and Architecture (BCS302) Syllabus PDF – B.Tech 2nd Year
Computer Organization and Architecture BCS302
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Official AKTU syllabus of Computer Organization and Architecture (BCS302) for B.Tech 2nd Year – 4 credits, L-T-P 3-1-0. Read the unit-wise course content, course outcomes, evaluation pattern and recommended books online, or download the PDF.
Syllabus — Computer Organization and Architecture
Download PDFBCS302 · 4 credits · L-T-P 3-1-0
Course Outcomes
At the end of course, the student will be able to understand
| CO1 | Explain the organization of a digital computer system, processor architecture, register organization, buses, memory transfer, and addressing modes. | K 2 |
| CO2 | Analyze arithmetic and logic unit (ALU) operations. | K 4 |
| CO3 | Analyze the design and operation of hardwired and microprogrammed control units, instruction execution cycles, and pipelining techniques for processor performance enhancement. | K 4 |
| CO4 | Evaluate the performance of memory hierarchy, cache memory, virtual memory, and secondary storage techniques for efficient memory management. | K 5 |
| CO5 | Evaluate input/output organization, interrupt handling, data transfer techniques, and serial communication interfaces for effective interaction between the processor and peripheral devices. | K 5 |
Course Content
L-T-P: 3-1-0
| Unit | Topic | Proposed Lecture |
|---|---|---|
| I | Introduction: Functional units of digital system and their interconnections, buses, bus architecture, types of buses and bus arbitration. Register, bus and memory transfer. Processor organization, general registers organization, stack organization and addressing modes. | 08 |
| II | Arithmetic and logic unit: Look ahead carries adders. Multiplication: Signed operand multiplication, Booths algorithm and array multiplier, Division and logic operations, Floating point arithmetic operation, Arithmetic & logic unit design. IEEE Standard for Floating Point Numbers | 08 |
| III | Control Unit: Instruction types, formats, instruction cycles and sub cycles (fetch and execute etc), microoperations, execution of a complete instruction. Program Control, Reduced Instruction Set Computer, Pipelining. Hardwire and micro programmed control: micro programme sequencing, concept of horizontal and vertical microprogramming. | 08 |
| IV | Memory: Basic concept and hierarchy, semiconductor RAM memories, 2D & 2 1/2D memory organization. ROM memories. Cache memories: concept and design issues & performance, address mapping and replacement Auxiliary memories: magnetic disk, magnetic tape and optical disks Virtual memory: concept implementation. | 08 |
| V | Input / Output: Peripheral devices, I/O interface, I/O ports, Interrupts: interrupt hardware, types of interrupts and exceptions. Modes of Data Transfer: Programmed I/O, interrupt initiated I/O and Direct Memory Access., I/O channels and processors. Serial Communication: Synchronous & asynchronous communication, standard communication interfaces. | 08 |
Text Books
- Computer System Architecture - M. Mano
- Carl Hamacher, Zvonko Vranesic, Safwat Zaky Computer Organization, McGraw-Hill, Fifth Edition, Reprint 2012
- John P. Hayes, Computer Architecture and Organization, Tata McGraw Hill, Third Edition, 1998. Reference books
- William Stallings, Computer Organization and Architecture-Designing for Performance, Pearson Education, Seventh edition, 2006.
- Behrooz Parahami, “Computer Architecture”, Oxford University Press, Eighth Impression, 2011.
- David A. Patterson and John L. Hennessy, “Computer Architecture-A Quantitative Approach”, Elsevier, a division of reed India Private Limited, Fifth edition, 2012
- Structured Computer Organization, Tannenbaum(PHI)
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